CameraWelcome to Eric's Virtual Home

Welcome to my homepage! I try to update this virtual home as often as possible but some of the information may not be accurate anymore. If you have any questions or comment about this page or its content, just send me an email: Eric _at_ Debes.net

The content of this PERSONAL homepage reflects my OWN opinion and has nothing to do with the work I am doing for my current employer.

Eric Debes, Mobile Platform Group, Intel Corporation, RNB6-49, 2200 Mission College Blvd, Santa Clara CA-95052-8119.

 

 

Short Bio

I was born in Strasbourg, Alsace, France

In 1996 I received a Master of Science in Electrical Engineering and Computer Science  from Supelec, France.

In 1997, I received a Master of Science in Electrical and Computer Engineering from the Technical University Darmstadt, Germany, I did my diploma thesis in the Visual Computing Department of the Fraunhofer Institute for Computer Graphics, Darmstadt, Germany, where I worked on the application of wavelet transform for visibility analysis in fog conditions in the framework of the VESUV project.

From July 1997 until the end of 2000 I have been a research assistant at the Signal Processing Institute (ITS) of the Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland in the framework of a Partnership with Hewlett Packard. During this great period of my life I had three main activities: as a member of the HP Multimedia Group, I worked on the performance of multimedia applications running on PC workstations; as a PhD student, I worked on a thesis titled "Exploitation of Parallelism in General-Purpose Based Systems for Multimedia Applications"; as an assistant of the Swiss Federal Institute of Technology, I was involved in the academic life. In December 2000 I got a PhD in Electrical Engineering from the Swiss Federal Institute of Technology (EPFL).

My Intel Life

In March 2001 I moved to Intel Labs, Santa Clara, California. As a senior researcher in the Media Systems Group of the Microprocessor Research Labs I worked together with different processor and microarchitecture groups on the definition of new media and communication features (including new SIMD and streaming instructions, multicore processors, low-power features, VLIW architectures) in the CPU and the chipset. I also proposed innovative software techniques and programming models to enable efficient exploitation of parallelism in general-purpose processor based systems for media and communication applications. In 2003 and 2004 I worked on System-on-chip modeling and architecture design space exploration for consumer electronics and cellphone/handheld devices.

Beginning 2005 I moved to the Intel mobile platform architecture group to manage the platform power/performance pathfinding team. My team is involved in system architecture definition for future mobile devices (laptops and handhelds) based on platform level power/performance tradeoffs using existing reference boards as well as simulators. The simulation infrastructure is being developed in close collaboration with multiple component groups in the US and in Israel, as well as a team of system architects and software developers in Bangalore, India. I am also working closely with the mobility group strategic planning team to define roadmaps for future mobile platforms.

Here you can find a pdf version of my Resume.

Hobbies

My hobbies are skiing in winter as well as hiking and sailing the rest of the year. I also like a wide variety of different cuisines and good wine.